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PABLO ABAD FIDALGO

  • Publications

    19

  • Projects

    4

  • Thesis

    1

  • Patents and technologies

    3

 pablo.abad@unican.es

 Facultad de Ciencias. Avda. de los Castros, 48. 39005 Santander

Profesor Titular de Universidad

Doctor por la Universidad de Cantabria

 Computer Engineering

 DEPARTAMENTO DE INGENIERÍA INFORMÁTICA Y ELECTRÓNICA

Specialty areas: ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES

Identifiers

19 results 
       

Performance characterization of popular DNN models on out-of-order CPUs

Conference object

2023 32nd International Conference on Parallel Architecture and Compilation Techniques: PACT 2023: Vienna, Austria, 21-25 October 2023: proceedings

 Authorship: PABLO PRIETO TORRALBO, PABLO ABAD FIDALGO, JOSE ANGEL GREGORIO MONASTERIO, VALENTIN PUENTE VARONA

 2023

Top-down performance profiling on NVIDIA's GPUs

Conference object

2022 IEEE 36th International Parallel and Distributed Processing Symposium: proceedings

 Authorship: ALVARO SAIZ SANCHEZ, PABLO PRIETO TORRALBO, PABLO ABAD FIDALGO, JOSE ANGEL GREGORIO MONASTERIO, VALENTIN PUENTE VARONA

 2022

Herramienta para la identificación de los cuellos de botella en microarquitecturas de GPUs

Conference object

Avances en arquitectura y tecnología de computadores : Actas de las Jornadas SARTECO 2022

 Authorship: ALVARO SAIZ FERNANDEZ, PABLO PRIETO TORRALBO, PABLO ABAD FIDALGO, JOSE ANGEL GREGORIO MONASTERIO, VALENTIN PUENTE VARONA

 2022

Fast, accurate processor evaluation through heterogeneous, sample-based benchmarking

Article

IEEE Transactions on Parallel and Distributed Systems, 2021, 32(12), 2983-2995

 Authorship: PABLO PRIETO TORRALBO, PABLO ABAD FIDALGO, JOSE ANGEL GREGORIO MONASTERIO, VALENTIN PUENTE VARONA

 17/05/2021

BenchCast: meta-benchmarking para evaluación de rendimiento del procesador

Conference object

Avances en arquitectura y tecnología de computadores: Actas de las Jornadas SARTECO 20/21. Málaga, 21 a 24 de Septiembre de 2021

 Authorship: PABLO PRIETO TORRALBO, PABLO ABAD FIDALGO, JOSE ANGEL HERRERO VELASCO, JOSE ANGEL GREGORIO MONASTERIO, VALENTIN PUENTE VARONA

 2021

SPECcast: A Methodology for Fast Performance Evaluation with SPEC CPU 2017 Multiprogrammed Workloads

Conference object

Proceedings of the 49th International Conference on Parallel Processing, Edmonton, Canada, August 17-20, 2020

 Authorship: PABLO PRIETO TORRALBO, PABLO ABAD FIDALGO, JOSE ANGEL HERRERO VELASCO, JOSE ANGEL GREGORIO MONASTERIO, VALENTIN PUENTE VARONA

 2020

Architecting racetrack memory preshift through pattern-based prediction mechanisms

Conference object

2019 IEEE 33rd International Parallel and Distributed Processing Symposium : IPDPS 2019 : Proceedings, 20-24 May 2019, Rio de Janeiro, Brazil

 Authorship: ADRIAN COLASO DIEGO, PABLO PRIETO TORRALBO, PABLO ABAD FIDALGO, VALENTIN PUENTE VARONA, JOSE ANGEL GREGORIO MONASTERIO

 2019

MOSAIC: a scalable coherence Protocol

Article

International Journal of Parallel Programming, 2018, 46, 1110-1138

 Authorship: LUCIA GREGORIO MENEZO, VALENTIN PUENTE VARONA, PABLO ABAD FIDALGO, JOSE ANGEL GREGORIO MONASTERIO

 2018

Memory hierarchy characterization of NoSQL applications through full-system simulation

Article

IEEE Transactions on Parallel and Distributed Systems, 2018, 29(5), 1161-1173

 Authorship: ADRIAN COLASO DIEGO, PABLO PRIETO TORRALBO, JOSE ANGEL HERRERO VELASCO, PABLO ABAD FIDALGO, LUCIA GREGORIO MENEZO, VALENTIN PUENTE VARONA, JOSE ANGEL GREGORIO MONASTERIO

 01/05/2018

Precisión vs. Coste Computacional en la Simulación de Sistemas Distribuidos

Conference object

Avances en arquitectura y tecnología de computadores : actas de las Jornadas SARTECO, 12-14 sept., Teruel

 Authorship: ADRIAN COLASO DIEGO, PABLO PRIETO TORRALBO, JOSE ANGEL HERRERO VELASCO, PABLO ABAD FIDALGO, VALENTIN PUENTE VARONA, JOSE ANGEL GREGORIO MONASTERIO

 2018

LIGERO: A light but efficient router conceived for cache-coherent chip multiprocessors

Article

ACM Transactions on Architecture and Code Optimization, 2013, 9(4), 1-21

 Authorship: PABLO ABAD FIDALGO, VALENTIN PUENTE VARONA, JOSE ANGEL GREGORIO MONASTERIO

 2013

Interaction of NoC design and coherence protocol in 3D-Stacked CMPs

Conference object

2013 Euromicro Conference on Digital System Design (DSD) : Proceedings

 Authorship: PABLO ABAD FIDALGO, PABLO PRIETO TORRALBO, LUCIA GREGORIO MENEZO, ADRIAN COLASO DIEGO, VALENTIN PUENTE VARONA, JOSE ANGEL GREGORIO MONASTERIO

 2013

Adaptive-tree multicast: efficient multidestination support for CMP communication substrate

Article

IEEE Transactions on Parallel and Distributed Systems, 2012, 23(11), 2010-2023

 Authorship: PABLO ABAD FIDALGO, VALENTIN PUENTE VARONA, LUCIA GREGORIO MENEZO, JOSE ANGEL GREGORIO MONASTERIO

 01/11/2012

Balancing performance and cost in CMP interconnection networks

Article

IEEE Transactions on Parallel and Distributed Systems, 2012, 23(3), 452-459

 Authorship: PABLO ABAD FIDALGO, VALENTIN PUENTE VARONA, JOSE ANGEL GREGORIO MONASTERIO

 01/03/2012

Improving coherence protocol reactiveness by trading bandwidth for latency

Conference object

ACM International Conference on Computing Frontiers 2012 (CF 2012): Proceedings, 15-17 May, 2012, Cagliari, Italy

 Authorship: LUCIA GREGORIO MENEZO, VALENTIN PUENTE VARONA, PABLO ABAD FIDALGO, JOSE ANGEL GREGORIO MONASTERIO

 2012

BIXBAR: A low cost solution to support dynamic link reconfiguration in networks on chip

Conference object

IEEE 30th International Conference on Computer Design (ICCD),September 30 - October 3, 2012 Montreal, Quebec, Canada

 Authorship: PABLO ABAD FIDALGO, PABLO PRIETO TORRALBO, VALENTIN PUENTE VARONA, JOSE ANGEL GREGORIO MONASTERIO

 2012

TOPAZ: an open-source interconnection network simulator for chip multiprocessors and supercomputers

Conference object

Proceedings of the 6 th IEEE/ACM International Symposium on Networks-on-Chip NoCS 2012, 9-11 May, Copenhagen, Denmark

 Authorship: PABLO ABAD FIDALGO, PABLO PRIETO TORRALBO, LUCIA GREGORIO MENEZO, ADRIAN COLASO DIEGO, VALENTIN PUENTE VARONA, JOSE ANGEL GREGORIO MONASTERIO

 2012

19 results 
       

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