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Lagarto I RISC-V Multi-core: Research Challenges to Build and Integrate a Network-on-Chip


Abstract: Current compute-intensive applications largely exceed the resources of single-core processors. To face this problem, multi-core processors along with parallel computing techniques have become a solution to increase the computational performance. Likewise, multi-processors are fundamental to support new technologies and new science applications challenges. A specific objective of the Lagarto project developed at the National Polytechnic Institute of Mexico is to generate an ecosystem of high-performance processors for the industry and HPC in Mexico, supporting new technologies and scientific applications. This work presents the first approach of the Lagarto project to the design of multi-core processors and the research challenges to build an infrastructure that allows the flagship core of the Lagarto project to scale to multi- and many-cores. Using the OpenPiton platform with the Ariane RISC-V core, a functional tile has been built, integrating a Lagarto I core with memory coherence that executes atomic instructions, and a NoC that allows scaling the project to many-core versions. This work represents the initial state of the design of mexican multi-and many-cores processors.



Otras comunicaciones del congreso o articulos relacionados con autores/as de la Universidad de Cantabria

 Congreso: International Conference on Supercomputing in Mexico, ISUM (10th : 2019 : Monterrey, México)

Editorial: Springer Verlag

 Año de publicación: 2019

Nº de páginas: 14

Tipo de publicación: Comunicación a Congreso

ISSN: 1865-0929

Url de la publicación: https://doi.org/10.1007/978-3-030-38043-4_20

Autores/as

LEYVA-SANTES, NEIEL
HERNÁNDEZ-CALDERÓN, CÉSAR A.
MORETÓ, MIQUEL
RAMÍREZ-SALINAS, MARCO A.
VILLA-VARGAS, LUIS A.