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Impact of the noise on the emulated grid voltage signal in hardware-in-the-loop used in power converters

Abstract: This work evaluates the impact of the input voltage noise on a Hardware-In-the-Loop (HIL) system used in the emulation of power converters. A poor signal-to-noise ratio (SNR) can compromise the accuracy and precision of the model, and even make certain techniques for building mathematical models unfeasible. The case study presents the noise effects on a digitally controlled totem-pole converter emulated with a low-cost HIL system using an FPGA. The effects on the model outputs, and the cost and influence of different hardware implementations, are evaluated. The noise of the input signals may limit the benefits of increasing the resolution of the model.

Otras publicaciones de la misma revista o congreso con autores/as de la Universidad de Cantabria

 Autoría: Lamo P., Ruiz G.A., Azcondo F.J., Pigazo A., Brañas C.,

 Fuente: Electronics, 2023, 12(4), 787

Editorial: MDPI

 Fecha de publicación: 04/02/2023

Nº de páginas: 14

Tipo de publicación: Artículo de Revista

 DOI: 10.3390/electronics12040787

ISSN: 2079-9292

Proyecto español: PID2021-128941OB-I00