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Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project

Abstract: In this article, we present the work-in-progress of the EU FP7 PHARAON project, started in September 2011. The first objective of the project is the development of new techniques and tools capable to guide and assist the designer in the development process, from UML specifications to implementation and debug on multicore platform. This tool chain will offer the possibility to propose and implement several parallelization strategies and drive the designer into implementation steps. The second objective of the project is to develop monitoring and control techniques in the middleware of the system capable to automatically adapt platform services to applications requirements and therefore reduce power consumption in a transparent manner for applications.

Authorship: Posadas H., Nicolás A., Peñil P., Villar E., Broekaert F., Bourdelles M., Cohen A., Lazarescu M., Lavagno L., Terechko A., Glassee M., Prieto M.,

Fuente: Microprocessors and microsystems, 2014, 38(8), Part B, 960-975

Publisher: Elsevier

Publication date: 01/11/2014

No. of pages: 16

Publication type: Article

DOI: 10.1016/j.micpro.2014.05.003

ISSN: 0308-5953,0141-9331

European project: info:eu-repo/grantAgreement/EC/FP7/288307/EU/Parallel and Heterogeneous Architecture for Real-time ApplicatiONs/PHARAON/

Publication Url: https://doi.org/10.1016/j.micpro.2014.05.003

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